Cadence's Palladium XP II platform speeds system verification

September 11, 2013 // By Graham Prophet
The Palladium XP II, Cadence says, doubles verification productivity, while the Enhanced System Development Suite delivers up to 60x speed-up for embedded OS verification and 10x performance increase in hardware/software verification

The Palladium XP II platform builds on the Palladium XP emulation technology, extending its capacity to 2.3 billion gates. With reduced power and increased gate density, customers can now run larger payloads in a smaller footprint, reducing overall cost of ownership. Cadence has also added support for eight new mobile and consumer protocols for simulation acceleration.

Expanded capabilities of its System Development Suite centre around Palladium, adding:

• hybrid technology, which combines the Cadence Virtual System Platform with the Palladium XP series to speed up embedded OS verification and increase performance for hardware/software verification;

• embedded test bench for advanced virtualisation of system environments, enabling users to verify peripheral software drivers prior to Soc tape-out, resulting in faster post-silicon bring-up.

The 60-times claim for OS bring-up comes from a user quote by Nvidia; “With the Cadence Palladium Virtual System Platform hybrid solution, we experienced up to 60x speed-up of OS bring-up over pure in-circuit emulation combined with up to 10x performance improvement for production and test software executing on top of the OS interacting with accurate hardware representations in the Palladium platform,” said Narendra Konda, director of engineering at NVIDIA.

“Using the Palladium platform and its embedded test bench use model, we uncovered critical issues and resolved them prior to tape out, using models of peripheral devices that are connected to the SoC as part of a fully synthesizable embedded test bench,” said Vahid Ordoubadian, director of IC Engineering, Mobile Platform Solutions at Broadcom Corp.