Flex Logix awarded patent for tiling eFPGA cores

March 03, 2018 // By Peter Clarke
The interconnect technology has been claimed to be one of the features that allows Flex Logix to achieve superior density for its FPGA fabric and now Cheng Weng, co-founder, has received an additional switch interconnect patent.

U.S. Patent 9,906,225 enables the tiling of cores so Flex Logix's EFLX 4K core can be used to create multiple arrays from 4K to 200K.

The patent enables a single eFPGA IP core, which is itself a complete eFPGA with programmable logic, interconnect and I/O ring, to be arrayed into a large number of arrays of customer-definable larger sizes. This is accomplished by implementing a top-layer mesh-like switch interconnect in the eFPGA core to provide connection between cores when abutted implementing a top-level interconnect that extends across arrays up to a certain maximum size (7x7 in the case of the EFLX4K, enabling a 200K LUT4 array).

"This is a major competitive advantage for our customers because not only do they want proven eFPGA IP in silicon, but they also want it in very different sizes," said Geoff Tate, CEO and co-founder of Flex Logix, in a statement.

Related links and articles:

www.flex-logix.com

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CEO interview: Flex Logix' Geoff Tate on licensing FPGA

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