IMEC reports nanowire FET in 'vertical' SRAM: Page 2 of 2

June 16, 2016 // By Peter Clarke
IMEC has reported a junction-less gate-all-around (GAA) nanowire field effect transistor as a promising candidate for integrated circuits at the 7nm node and beyond.
Huawei, Qualcomm and Sony.

IMEC is clearly of the opinion that GAA nanowires could be adopted and demonstrate benefits almost immediately at 7nm although such changes are typically slow and may take several years. An Steegen, IMEC senior vice president of process technology is set to give a talk at Semicon West in July called "Pathfinding beyond 5nm"

Speaking at the IMEC Technology Forum held in Brussels recently Steegen pointed out that as FinFETs move from 10nm nominal to 7nm nominal the performance gains would be less than 30 percent in voltage scaling and less than 15 percent in clock frequency whereas a 7nm nanowire device should see  greater than 44 percent improvement in power consumption and greater than 20 percent improvement in performance. This gains are at a similar scale for the transition to 5nm as well, Steegen has indicated.

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