Lattice FPGAs take on sensor fusion signal processing

December 13, 2016 //By Graham Prophet
Lattice Semiconductor positions its iCE40 UltraPlus Devices as the smallest FPGAs with enhanced memory and DSPs; they can improve system performance, reduce system cost, power consumption and time-to-market, while enabling always on, distributed processing.

Energy-efficient parallel processing allows always-on monitoring and accelerated computation; flexible I/Os simplify board-level design; and the devices are configured to offer IoT-edge memory with up to 1 Mbit of embedded memory for sensor data buffering. Lattice cites the increasingly common case of devices with multiple different sensor inputs, that may use a variety of different interface buses. In both architectural terms and in the physical space (a simple interface between two PCBs), the designer might aggregate GPIOs, SPI, UART, I ²C, I ³C/MIPI signals and more over a single PCB trace to eliminate routing contention issues. You might, a Lattice spokesman proposes, “scatter a few of these [chips] around a system, to keep the load off the main processor.”

 

iCE40 UltraPlus FPGAs are, Lattice says, an energy-efficient and programmable mobile heterogeneous computing (MHC) solution. This addition to the iCE40 Ultra family has eight times more memory (1.1 Mbit RAM), twice the digital signal processors (8x DSPs), and improved I/Os over previous generations. Available in multiple package sizes, Lattice suggests uses in smartphones, wearables, drones, 360 cameras, human-machine interfaces (HMIs) and industrial automation, as well as security and surveillance products. Phones and IoT edge products, such as wearables and home audio assisted devices, can be always on, always listening and ready to instantly process commands locally without going to the cloud. In MHC, the concept is to provide an energy-efficient method for computing algorithms quickly and locally using dissimilar processors to offload power hungry applications processors (APs) in battery-powered devices. More DSPs offer the ability to compute higher-quality algorithms, while increased memory allows data to be buffered for longer low-power states. The flexible I/Os enable a more distributed heterogeneous processing architecture. This combination provides flexibility to enable OEMs and the “maker” market to deliver key innovations, such as always on sensor buffers and acoustic beam forming.

 

Suggested applications include;

- Always-on sensor buffer and distributed processing for