The process monitor IP enables the implementation of continuous dynamic frequency and voltage ccaling (DVFS) optimisation systems, monitor manufacturing variability across chip, gate delay measurements, critical path analysis, critical voltage analysis and also monitor silicon ageing. The monitor IP can also monitor analog (IO) supply domains and is also suitable to monitoring supply droops and perturbations.
The suite of IP cores includes a PVT controller to support multiple monitor instances, statistics gathering, and production test access.
Moortec has also opened a design center in Gdansk, Poland that will be managed by Szymon Gerka, with support from Moortec CTO, Oliver King.
Moortec is looking to recruit designers to come and work in Gdansk and elsewhere.
"We are looking forward to growing the team and continuing to provide highly accurate, highly featured monitoring IP to optimise the performance and reliability of today’s modern SoCs whether that be for consumer, telecommunications, datacentre and enterprise applications or for emerging markets such as automotive, IoT and AI," said Ramsay Allen, vice president of marketing for Moortec Semiconductor.
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