Advances within the JESD204B converter protocol: Page 8 of 9

December 16, 2013 //By Jonathan Harris & Ian Beavers, Analog Devices
Advances within the JESD204B converter protocol
A new converter interface is steadily picking up steam and looks to become the protocol of choice for future converters. This new interface, JESD204, was originally rolled out several years ago, but it has undergone revisions that are making it a much more attractive and efficient converter interface.
sends a continuous sequence of pre-determined control characters that will allow the testing of jitter, code group synchronization, and a receiver eye mask. Another pattern sends a repeated initial lane alignment sequence request to the receiver. A final set contains pseudorandom and pre-determined data with varying lengths of repetition. These patterns can be used to test the bit error rate (BER) on the link, as both the transmitter and receiver know the expected sequence of data. When the patterns are used in conjunction with the eye scan tool, a complete BER of the link can be measured.


As the speed and resolution of converters have increased, the demand for a more efficient digital interface has increased. The industry began to address this with the JESD204 serialized data interface. The interface specification has continued to evolve to offer a better and faster way to transmit data between converters and FPGAs (or ASICs).

Looking to the future of converter digital interfaces, it is clear that JESD204 is poised to become the industry choice for the digital interface to converters. Each revision has answered the demands for improvements on its implementation and has allowed the standard to evolve to meet new requirements brought on by changes in converter technology. As system designs become more complex and converter performance pushes higher, the JESD204 standard should be able to adapt and evolve to continue to meet the new design requirements necessary.

There are many advantages that JESD204 brings to the table. Designers need not fear new and expensive tools. With the creation of low-cost development tools, such as the Analog Devices Linux JESD204B Eyescan software, system design implementation can be realized with a low burden rate on the engineering team. Using tools such as these, along with the modeling capabilities provided by the IBIS-AMI models, designers can easily migrate to this new interface without a large expense in time or cost. State-of-the-art systems with

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