Meet the SERDES challenge: Design a high-speed serial backplane

October 10, 2011 //By Michael Heimlich
Meet the SERDES challenge: Design a high-speed serial backplane
Dr. Michael Heimlich examines the design flow for a high-speed serial backplane to meet the challenge posed by SERDES technology.

The benefit of having high-frequency design tools resident on a vector network analyzer (VNA) does not become obvious until the time comes to compare simulation to measurements. At this point, the advantage of a more streamlined work flow -- without the impediment of transferring data to a simulator running on a separate PC or workstation - becomes clear. To illustrate the benefit of such an
approach, this article follows the design flow for a high-speed serial backplane.

BACKGROUND: THE SERDES CHALLENGE
Increasing chip-to-chip, board-to-board, and system-to-system communications data rates have created the need for multi-gigabit asynchronous signaling schemes in which serializer/deserializer (SERDES) technology is used to format and transfer data. Analysts predict that SERDES I/O data rates will double every two to three years, so speeds in excess of 8Gb/s are already on the way and placing the SERDES design challenge clearly into the microwave domain. Consequently, designers familiar only with lower-speed buses will now be facing new physical and electrical design challenges.

For example, with SERDES, bit error rate (BER) must be maintained at 10E-12 or below, yet the loss incurred by low-cost packaging, printed circuit board, and backplane materials increases with frequency. In addition, mismatch, coupling, dispersion, and other RF effects degrade the quality of the channel connecting the transmitter to the receiver. Consequently inter-symbol interference (ISI) and crosstalk simulations must use accurate modeling that includes analog, RF, and electromagnetic (EM) effects. Microwave quality models of the channel are also necessary in order to capture the effects of dispersion and coupling.

In an ideal world, a serial channel model based upon a combination of both measurement and simulation would ensure compliance within manufacturing tolerances. Thankfully this ideal is realizable today with AWR’s Microwave Office software embedded onto the Anritsu’s VectorStar VNA (The VectorStar family is Anritsu’s Premium VNA line. The MS4640A Series offers the best performance covering a span of 70 kHz to 70 GHz.)

Figure 1. High-speed
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