Analog Tips: Linear regulator powers PLLs, VCOs and clocking ICs

Analog Tips: Linear regulator powers PLLs, VCOs and clocking ICs

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Wideband communication systems usually require an ultra-low-noise regulator to power the VCOs and PLLs. The regulator must also be able to reject any ripple presented at its input.
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In a typical system, an AC input is converted to an isolated DC supply rail; for example, at 48V. This rail is then converted to an isolated 12V system rail that powers the main components in the communication system

This 12V system rail is generated by inductive switching elements that create ripple and noise on the rail. To provide a clean power rail, an ultralow-noise regulator is required to generate the 5V rail used to power the wideband PLL and VCO. Any noise or ripple present on the 5V rail will degrade the performance of the PLL or VCO.

Ultralow-Noise LDOs

The fixed-output ADM7150 and adjustable-output ADM7151 ultralow-noise linear regulators for RF signal devices operate from 4.5V to 16V, provide up to 800 mA of output current, and support output voltages from 1.5 to 5.0V. The LDOs achieve 1.4 nV/√Hz output noise spectral density (NSD) from 10 kHz to 1 MHz, significantly reducing VCO phase noise in point-to-point microwave radios, satellite communications, defence electronics, and other wideband systems. In addition, a user-adjustable capacitor can significantly reduce low-frequency noise (8 nV/√Hz at 100 Hz) for precision analogue front-end measurement systems. The total solution size is only 7.62 × 5.21 mm.



Noise spectral density and power supply rejection (PSRR)

The typical output noise is 1.0 μV rms from 100 Hz to 100 kHz for fixed-output-voltage options, with 1.7 nV/√Hz noise spectral density from 10 kHz to 1 MHz. Using a proprietary architecture, the regulators provide high power supply rejection (>90 dB from 1 kHz to 1 MHz), and achieve excellent line and load transient response with a 10 μF ceramic output capacitor.

The emergence of wideband communications is driving the need for newer ultra-low noise LDOs for powering the next generation of PLL/VCO and clocking devices. The ADM7150/ADM7151 LDOs reduce noise spectral density by a factor of two and provide the lowest phase noise for powering VCOs and the lowest jitter performance for powering clocks in microwave systems.

Maurice O’Brien [maurice.obrien@analog.com] joined Analog Devices in 2002, following his graduation from the University of Limerick, Ireland, with a bachelor’s degree in electronic engineering. He currently works as a product marketing manager in the Power Management product line.

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