austriamicrosystems releases new versions of process design kit for 0.35-um specialty processes

austriamicrosystems releases new versions of process design kit for 0.35-um specialty processes

Technology News |
austriamicrosystems business unit Full Service Foundry has introduced a new analog/mixed signal high performance process design kit (HIT-Kit) for its 0.35 µm CMOS, High-Voltage CMOS and SiGe-BiCMOS specialty technologies.
By eeNews Europe

Share:

Based on Cadence Virtuoso Custom IC technology, the new HIT-Kit improves the time-to-market for highly competitive products in the analog intensive mixed signal arena. Supporting designers in creating their first-time-right mixed signal designs even for complex designs, this comprehensive design environment with its highly accurate simulation models and flexible SKILL-based PCells provides a proven route to silicon.

The new HIT-Kit 3.80 is available for Cadence Design Systems’ Virtuoso custom design platform IC 5.1.41 and supports the high performance 0.35 µm process technologies C35 (CMOS), S35 (SiGe BiCMOS) and H35 (High-Voltage CMOS). The HIT-Kit comes complete with silicon-qualified digital, analog and RF library elements, complete sets of low voltage devices (3.3 V and 5.0 V) and high-voltage devices (20 V, 50 V and 120 V devices) with various gate oxide thicknesses.

The newly developed 0.35 µm high density digital standard cell libraries included in this HIT-Kit have an increased gate density of approx. 23 kGates/mm² and enable significantly smaller die size along with performance improvements. Fully characterized simulation models for a large set of simulators, extraction and verification run sets for both, Calibre and Assura and automatic layout device generators (PCells) are included. Features such as Safe Operating Area verification tool (SOAC) as well as a Life-Time simulation tool complete the HIT-Kit offering; hence product developers are enabled with a plug-and-play tool set which facilitates "first time right" designs.

The new silicon-validated ESD protection library guarantees 1 kV, 2 kV, 4 kV and 8 kV HBM (Human Body Model) ESD protection and is compliant to the MIL-883E, Method 3015.7 and JEDEC JESD22-A114B ESD standards. In C35 technology the total I/O libraries consist of more than 1800 cells supporting 3.3V and 3.3V/5V designs. The specialty High Voltage CMOS process H35 with its isolated libraries offers even more than 2400 core and periphery cells.

The HIT-Kit supports RedHat EL 3.0, EL 4.0 and Sun Solaris 8, 9 &10 operating systems.

More information about the new HIT-Kit version at
https://asic.austriamicrosystems.com/hitkit380

Linked Articles
eeNews Analog
10s