Europe spends €3 million in neuromorphic R&D around SynSense
The project reportedly began in January 2020 with a team that included researchers from Leti, IMEC, IBM Zurich and the China-backed Swiss startup SynSense AG (see Swiss neuromorphic startup changes name, raises money).
The official title of the 42-month project is ‘Memory technologies with multi-scale time constants for neuromorphic architectures’ shortened to MeM-Scales. The project is 100 percent funded by European Union tax payers to the amount of €3,950,628 and 75 eurocents according to the Horizon2020 project page here. Under the contract SynSense receives €200,000.
The plan is for MeM-Scales to build novel memory and device technologies and autonomous learning algorithms to support on-chip learning for both synapses and neurons. This would be done with a view to merging biological and electronic sensing and computation in such applications as distributed environmental monitoring, implantable medical diagnostic microchips, wearable electronics and human-computer interaction.
The results will be used to build neuromorphic computing systems that can process efficiently real-world sensory signals and natural time-series data in real-time and to demonstrate this with a practical laboratory prototype. This will enable low-power and always-on IoT and edge-computing computing processing systems for applications do not need to, or cannot afford to, connect to the cloud.
Next: Nine orders of magnitude
The significance of multi-timescale in the naming of the project comes from biological neural processing that can occur over time-scales ranging from milliseconds (axonal transmission) to seconds (spoken phrases) and much longer intervals (motor learning).
“The MeM-Scales project aims at lifting neuromorphic computing in analog spiking microprocessors to an entirely new level of performance,” said Elisa Vianello, manager of CEA-Leti’s AI program and the coordinator of the MeM-Scales project.
The project is looking to use multi-timescale resistive non-volatile memory technologies as well as thin-film transistor (TFT) technology timescales spanning up to nine orders of magnitude. Computational methods will be tailored to cope with low numerical precision, parameter drift, stochasticity and device mismatch that are inherent in analog nanoscale devices.
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