With the emergence of RISC-V in 2016 and 2017 open source hardware became a hot topic once again and a startup called Oliscience BV (Amsterdam, The Netherlands) was formed in 2017 to look after the OpenCores website and community. As a result, OpenCores, which was originally founded in 1999, is embarking on its third phase of ownership and is planning to emerge from a quiet period that lasted for several years.

In 2017, with support from Nikhef, the Dutch National Institute for Subatomic Physics, Andrea Borga, a digital designer at the Nikhef electronics technology department, and colleagues, acquired ownership of the OpenCores website, control of the various files and formed Oliscience. The amount paid to previous owners for OpenCores has not been disclosed.

Oliscience is a contraction of open logic interconnects science, which reflects the company’s origins in Europe’s scientific community. The company’s formation also reflects the fact that scientific researchers are frequent users of free IP cores and that they did not want to see OpenCores atrophy or disappear.

Borga had been a user of the website, which provides “gateware” – the downloadable files for intellectual property (IP) cores – on multiple functions.

Gateware is the term used to describe the layer in electronic engineering that lies between the physical components – such as ICs and PCBs, and firmware. The description of FPGAs in particular determines at run-time how a circuit is connected in the FPGA. But hardware descriptions for ASICs are also transferrable between foundries and processes and can be thought of as “gateware.”

At the time of the formation of Oliscience in 2017 Jan Visser, Nikhef’s industrial liaison officer, said: “The transfer of knowledge and technology to industry, civil society and the general public is an integral part of Nikhef’s mission. That is why Nikhef supports Oliscience as an initiative, as well as its attempt to empower the OpenCores portal and community.”

Next: Supporting bodies

In June 2018, Astron, the Netherlands Institute for Radio Astronomy, announced a collaboration with Nikhef to improve FPGA engineering design practices that included that it would join the OpenCores membership program.

Borga, CEO and CTO of Oliscience, told eeNews Europe: “As contributors and users of OpenCores we see that many scientific communities are massively using OC content without necessarily acknowledging the fact well enough. Or perhaps no one ever bothered to ask for formal support for the community, the users, and the organizations behind it.” He added: “The idea was brilliant and innovative and disruptive, and it still is: the execution failed at least twice. Now it’s our go.”

Initially OpenCores was not a failure, but it is arguable that it was ahead of its time. The group was co-founded in 1999 by Slovenian student Damjat Lampret, who also helped design a series of OpenRISC 32bit processors that were available through the portal. Lampret went on to co-found Beyond Semiconductor doo (Ljubljana, Slovenia), which has used OpenRISC in its commercial offerings.

Lampret relates that in 2006 alone more than 8,000 companies downloaded IP from OpenCores. In the first eight years of the organization a million engineers from more than 23,000 organizations downloaded IP. However, as Lampret moved on to more commercially-oriented activities the OpenCores brand was put up for sale in June 2007 (see OpenCores website, brand up for sale).

The second owner – from 2007 to 2017 – was a Swedish FPGA and ASIC engineering group called ORSoC AB (Stockholm, Sweden). ORSoC also formed a joint venture with KnCMiner that went on to become a leading Bitcoin mining company by developing two 28nm, one 20nm and one 16nm ASIC, using foundry TSMC for production.

At the launch of Oliscience in 2017, Borga said the OpenCores portal had been suffering from a lack of maintenance but still attracted many visitors and a few contributors.

Next: Projects

The list of projects accessible through the portal is long and covers fundamental arithmetic, memory and peripheral circuits, security, DSP, communications controllers and on up to a variety of RISC processor cores for stand-alone and microcontroller use. The most popular projects at present are artificial neural network (ANN) and I2C controller cores.

eeNews Europe asked Borga why he thinks Oliscience can be more successful than ORSoC at running the OpenCores website and supporting the open-source hardware community? “Because we care about the community, the site content, and the very specific niche market for FPGA-based scientific applications with huge impact on industrial return; because we originate from a scientific environment, and we know the needs of research first hand.”

Borga said that one of the problems with OpenCores had been an over-emphasis on the OpenRISC flagship project. Although OpenRISC has been much downloaded and much used, it never fully competed against the relationships and support ecosystem that went with the commercial licensing of processor cores such as ARM and MIPS. However, the RISC-V open source processor standard may start to change that situation.

Borga said of OpenCores: “What we will do differently – we are already – is to balance the contribution attention, the support to the community, and the refocus from ASIC to FPGA – which again is very different from what it was in 1999.

With regard to OpenRISC and RISC-V Borga told eeNews Europe in email correspondence: “We are not biased towards the one architecture or the other, although we admire the effort Stafford Horne is still putting in on OpenRISC; and he is not alone around the globe. OpenRISC is a very mature open source-development, and very often it had been wrongly marketed, or marketed not at all.”

Borga added: “We are also proud to see that OpenCores is now hosting RISC-V projects, which is a sign that there is tangible interest in participating in the OpenCores community.”

Related links and articles:

Related links and articles:

Free 32-bit processor core hits the Net

Swiss open-source processor core ready for IoT

Beyond launches 32bit secure processor core


Linked Articles
eeNews Analog