The French National Research Agency and CEA-Leti launch the NanoElec Grenoble Institute of Technological Research program to focus on 3D IC integration

The French National Research Agency and CEA-Leti launch the NanoElec Grenoble Institute of Technological Research program to focus on 3D IC integration

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The ANR (French National Research Agency) and the CEA (French Atomic and Renewable Energy Commission), together form the Grenoble Institute of Technological Research (IRT): NanoElec Program.
By eeNews Europe


Based on Grenoble’s pioneering ecosystem, the IRT partners aim to conduct world-class R&D, and to share their research with all industrial sectors, especially small, medium and intermediate sized enterprises, as well as to provide training in the necessary skills in these areas, specifically micro and nano-electronics. The technological R&D activities will focus on 3D IC integration and integrated silicon-photonics in which manufacturers STMicroelectronics and Mentor Graphics are the most involved. Very advanced technological research using state-of-the-art equipment will undertake by bringing the best possible experts from manufacturers and public laboratories into close partnership.

“I am delighted of the collaboration with Mentor Graphics, whose expertise in computer-aided design (CAD) tools will be able to make CEA-Leti and STMicroelectronics’s advanced technological achievements better available to systems and applications designers,” said Laurent Malier, CEO of CEA-Leti.

The NanoElec IRT is supported by CEA-Leti in partnership with manufacturers such as STMicroelectronics, Mentor Graphics, Soitec, Schneider, STEricsson, Bouygues, Presto Engineering and INEO, the Minalogic international competitive cluster, the Grenoble INP Institute of Technology teaching and research school, the Grenoble Ecole de Management school, the Joseph Fourier university, the INRIA (National Institute for Research in Computer Science and Control), the CNRS (National Center for Scientific Research), the Laue Langevin Institute, and the ESRF (European Synchrotron Radiation Facility).

The semiconductor industry has followed a path defined by Moore’s Law for 40 years. But today, transistor miniaturization is no longer enough to improve performances and reduce consumption. The concept of equivalent scaling and other changes to maintain that rate of progress have been defined as “More than Moore”. The most important of these is 3D IC integration.

The 3D IC integration concept aims to increase performance by stacking components. This additional approach combines with miniaturization to increase semiconductor performance and, at the same time, reduce costs and delays in accessing the market. This new and very different approach requires a large number of major innovations in design, modeling, simulation, manufacturing and testing. The lack of validated CAD tools to define effective architectures, as well as the lack of appropriate characterization methods and tools to predict reliability, are some of the obstacles that must be overcome before being able to validate the 3D IC integration approach.

Consequently, the main objective of the IRT’s 3D IC program is to validate an overall approach to 3D IC integration through a dedicated technological platform, taking into account the design, technological processes and characterization aspects.

Integrated silicon-photonics technologies should first address data transmissions and IT markets, then general public applications and sensors for markets such as environment and health. Thus, technical developments are first driven by information and communications technologies applications for data transmissions, chip-to-chip links, even intra-chip communications. As in other applications, silicon integration should lead to lower costs and smaller systems.

There are still many technical challenges to be met before successfully achieving photonic functions on a silicon circuit: providing CAD design tools, developing specific components like laser sources, optical modulators, wide bandwidth photo-detectors, passive waveguides, wavelength multiplexers and demultiplexers. There is also a need to develop high-performance generic electronics circuit blocks to activate optical components, integrate photonic functions with electronic functions, as well as to implement low-cost testing and assembling techniques.

The IRT’s integrated silicon-photonic program will develop critical technologies and techniques to bring photonic components to a sufficient level of maturity for their commercialization.

“As with 3D IC integration, silicon photonics has been the subject of joint work between the CEA and ST for several years. Thanks to the NanoElec IRT, the key players and all the design and technology means can work together to accelerate developments and open the applications field,” said Philippe Magarshack, STMicroelectronics Corporate Vice President, Design Enablement & Services.

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