Boosting mixed-signal design productivity with FPGA-based methods throughout the chip design process

By DVcon
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A team from Infineon and Stanford University shows the impact on overall design productivity when employing FPGA-based prototyping methods throughout the mixed-signal chip design process. Read More

Researchers used an open source modeling framework for generating synthesizable functional models of analog behavior that can be mapped on Xilinx FPGAs from an abstract model specification. In order to increase automation, ease-of-use and configurability when creating and working with FPGA-based prototypes, they used an open source FPGA automation framework.

Two FPGA-based prototypes for a smart magnetic sensor used in automotive applications were developed and applied during product definition, pre-silicon verification, post-silicon verification and design-in activities. One of the prototypes is intended to be part of a Hardware-in-the-Loop setup; it is real-time capable and small enough to be integrated into a customer’s system.

The other prototype serves as a computing platform and enables conducting parameter sweeps, regressions and interactive simulations. Compared to state-of-the-art CPU-based simulation, the designers were able to reduce regression runtime from roughly a month to hours. Additionally, activities related to product definition, customer design-in and post-silicon verification were conducted earlier and with more confidence in the application.

Gabriel Rutsch, Infineon Technologies AG, Neubiberg, Germany (

Simone Fontanesi, Infineon Technologies Austria AG, Villach, Austria (

Steven G. Herbst, Stanford University, Stanford, USA (

Steven Tan Hee Yeng, Infineon Technologies Austria AG, Villach, Austria (

Andrea Possemato, Infineon Technologies Austria AG, Villach, Austria (

Gaetano Formato, Infineon Technologies Austria AG, Villach, Austria (

Mark Horowitz, Stanford University, Stanford, USA (

Wolfgang Ecker, Infineon Technologies AG, Neubiberg, Germany (

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