Analysis: TSMC ponders US wafer fab while awaiting trade rule changes: Page 2 of 2

April 20, 2020 //By Peter Clarke
Analysis: TSMC ponders US wafer fab while awaiting trade rule changes
TSMC doesn't often build wafer fabs outside Taiwan but in the current mood of US-Chinese economic tension the world's leading foundry is willing to discuss the idea.

Back in 2017 the prevailing wisdom was that a TSMC 3nm wafer fab would involve a lifetime spend of about $16 billion.

Chairman's Liu's observation on the call that the cost of establishing supply chain ecosystem is one of the issues, makes things somewhat easier. A state such as California or Oregon could easily find cash and some sort of supply chain consortium could be cobbled together to ease costs for TSMC for a project that would be in the supply chain's and the state's interest.

The second objection Liu mentioned is where to find the professional engineers to occupy one of TSMC's leading-edge, highly automated wafer fabs. What about Oregon or Arizona?

That's where Intel has some manufacturing that is struggling to keep up with TSMC. Intel even has its Fab42 shell in Chandler, Arizona, earmarked for 7nm production. Could some sort of deal be fashioned around that?

As Intel seeks to head up the supply chain and become a "solutions provider" rather than a chip provider, having a foundry partner close at hand could be one way forward.

Perhaps the question now is" will the US bite and defer a tightening of the regulations while TSMC can intensify its search for a wafer fab location and suitable subsidies to make starting up on a new campus economic?

Related links and articles:

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Huawei stockpiling chips, expecting tighter US sanctions

Semiconductor industry pushes back against US export controls

TSMC considers US for 3nm wafer fab site

TSMC next for New York fab?

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