The technology integrates 3D sense amplifiers with the 3D memory cell array and thereby reduces 3D routing and increases cell efficiency by up to 95 percent.
Sang-Yun Lee, CEO of BeSang, said the technology would enable a 75 percent reduction in DRAM die cost, but did not indicate what is being compared.
"I expect 3D DRAM Plus will eventually replace planar DRAM products in the memory sector," said Lee in a statement. "Also, the applications of embedded cache memories will significantly boost CPU/GPU/AP performance while making the embedded cache memories more affordable."
BeSang did not indicate what manufacturing processes or existing memory compilers the technology is compatible with. "3D DRAM Plus" is available through IP licensing from BeSang.
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