As with the previous generation GAP8, Greenwaves is targeting applications at the very edge of the network, such as machine learning in sensors, and other battery operated systems. This includes applications such as people counting, face identification, dispensing machines.
The previous generation GAP8 is shipping manufactured in TSMC's 55nm manufacturing process. It is an octacore design based on the RISC-V opens-source hardware PULP core developed at the Universities of Bologna and ETF Zurich (see Swiss open-source processor core ready for IoT). It includes eight such cores plus a ninth as a controller for a microcontroller section. There is also a hardware convolution engine (HWCE) to accelerate neural network operations.
The GAP9 is similar to the GAP8 but is a 9 plus 1 design and is targeting the 22nm FDSOI process from Globalfoundries. The ninth RISC-V core is used to calculate memory movements and scheduling of routines on the main octacore architecture. The tenth serves as a house-keeping MCU. The use of dynamic body biasing and architecture enhancements makes GAP9 is capable of handling problems that are 10 times more complex than GAP8 with an energy efficiency that is 5 times better than GAP8.
Improvements include increased internal memory, improved internal bandwidth and the use of hardware compression. Martin Croome, vice president of marketing, said Greenwaves is targeting clock frequency of 400MHz for the design although the final specification is yet to be selected.
GAP9 incorporates additional security features protecting device makers’ firmware and models while also protecting devices from tampering, including hardware support for AES128/256 cryptography and a Physical Unclonable Function (PUF) unit that allows devices to be uniquely and securely identified. GAP9 also includes a CSI2 camera interface with identification applications.
Increased datatype support on GAP9. Source: Greenwaves Technologies.
GAP9 extends the capabilities of the GAP8 RI5CY cores with transprecision floating point units capable of operations on IEEE 16 and 32-bit floats and alternate 16-bit and 8-bit float representations. This enables simple porting of floating point libraries and power efficient implementation of algorithms requiring large dynamic range. GAP9 also supports 4bit data.
Croome said simulation models of the GAP9 have been available since May 2019 and that development boards containing GAP9 silicon would ship in the first half of 2020.
Related links and articles: