Image sensors to get AI in three-layer die stack

September 30, 2019 //By Peter Clarke
Image sensors to get AI in three-layer die stack
STMicroelectronics is preparing to adopt three-level hybrid bonding of die to create smart image sensors and 3D environmental sensors.

This approach to image sensor construction would necessitate the use of through silicon vias (TSVs) to link at least two of the layers.

This next step was presented in an otherwise largely historical description of ST's progress from CMOS image sensors to 3D environment sensing, provided in the imaging track at the SEMI organized MEMS & Imaging Sensors summit held in Grenoble, last week.

The presentation was given by Helene Wehbe-Alause, a senior engineer who had worked on a number of the developments, who was standing in for Laurent Malier, general manager of technology at ST.

Wehbe-Alause described three landmark developments in ST's progress. The first was the development and adoption of capacitive deep-trench isolation for pixels back in 2008. The second was the use of two-layer bonding, which allowed a top wafer to be optimized for photonics and a bottom wafer to be optimized for movement of data and low-power processing. The third was the move from a rolling shutter to a global shutter. Rolling shutters allow higher frame speeds but produce curved artefacts when objects are moving in the field of view.

Wehbe-Alause characterized ST's progress with reference to one of ST's most successful image sensor products; the FlightSense line of SPAD-based time-of-flight proximity and ranging sensors. This have come to replaces simple IR proximity sensors in many applications as these could be affected by the colour.

Research started in 2006 and resulted first products in 2013. More than 132 phone models now have FlightSense solutions designed, Wehbe-Alause said, based on the hybrid bonding approach.

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