The 66th IEDM is to be held virtually from 12 to 16 December, due to the Covid-19 pandemic but the online streaming could potentially boost consumption of content focused on the design, manufacturing, physics and modelling of semiconductor and related device technologies.
Notable papers this year include a presentation by authors from TSMC on its 5nm manufacturing process (paper 9.2) and from Samsung on its 5LPE 5nm manufacturing process (paper 20.1). These processes are already in commercial use while some of the more academic papers may be of significant interest for what may be coming in the next five years or so.
Although Europe has a diminishing market share in semiconductor manufacturing it is notable that research institute IMEC is the most prolific of authoring entities in this year's program. An IMEC affiliation from one or more authors is found on 27 of 230 technical papers due to be presented. It is therefore no surprise that Sri Samavedam, senior vice president of CMOS at IMEC, has been asked to given one of the three keynote papers.
Samavedam's talk is entitled: "Future logic scaling: towards atomic channels and deconstructed chips." This would appear to be a reference to the experiments being made in doping the active channels in various physical transistor layouts and the trend away from monolithic integration towards using 3D packaging to combine 'chiplets' made in heterogeneous manufacturing processes.
Both the 3D trends and the channel doping are well represented throughout the conference.
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