IMEC presents 'n-over-p' complementary FET proposal : Page 2 of 2

June 21, 2018 //By Peter Clarke
IMEC presents 'n-over-p' complementary FET proposal
IMEC has presented its idea of the complementary FET or CFET as contender for integrated circuit manufacturing nodes beyond 3nm at the 2018 Symposia on VLSI Technology and Circuits.

The research has been presented at the VLSI Technology Symposium, in session T13: FET performance and scaling. The research as performed in cooperation with equipment companies TEL Coventor and Lam Research and with semiconductor companies that are part of IMEC's core research program; Globalfoundries, Huawei, Intel, Micron, Qualcomm, Samsung, SK Hynix, Sony Semiconductor Solutions, Toshiba Memory, TSMC and Western Digital.

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