Intel authors are due to report on a 3.6Mbit array that can operate down to 0.5V and with a sensing time of 5ns at 0.7V.
From the information provided in the advanced program for the conference it is not possible to say what materials system Intel is using. Many material systems for non-volatile memory have been researched over many decades, including chalcogenide-based phase change memory which Intel uses for is 3D XPoint storage-class memory (see Intel launches SSD based on 3D XPoint memory ). However, a memory made using the migration of oxygen vacencies through layers of transition metal oxide – such as hafnium or titanium oxides – is a much-researched and likely solution for embedding in logic.
Intel's development follows on from the embedded magnetoresistive RAM (MRAM) for 22nm FinFET that Intel reported at IEDM in December 2018 (see IEDM: Intel embeds MRAM in FinFET process ).
It also shows Intel striving to maintain competition with foundry chip maker TSMC on the embedded non-volatile memory front. TSMC began offering embedded MRAM as an option for SoCs in 2018 (see TSMC embedded MRAM is key to Gyrfalcon AI chip ) and, according to reports, will offer embedded resistive RAM in 2019 (see Report: TSMC to offer embedded ReRAM in 2019 ).
Intel is also due to provide a paper at ISSCC on a 7Mbit macro 22nm embedded MRAM. This is due to discuss the offset-cancellation technique and write-verify-write scheme used to achieve 4ns read time at 0.9V.
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