Mixed foursome offers RISC-V development support

November 30, 2016 // By Peter Clarke
Mixed foursome offers RISC-V development support
UltraSoC has joined up with BaySand, Codasip and Codeplay to provide a broad development platform based on the open source RISC-V instruction set architecture.

The collaboration combines foundational IP and metal-configurable standard cell technology from BaySand Inc. (San Jose, Calif.), the Codix-Bk RISC-V processor from Codasip Ltd. (Brno, Czech Rep.), on-chip debug and analytics from UltraSoC Ltd. (Cambridge, England) and software development tools from Codeplay Software Ltd. (Edinburgh, Scotland).

Codeplay provides developers with a programming model that extends from device-specific functionalities to machine learning paradigms such as Google’s TensorFlow. Codeplay's ComputeSuite extends the RISC-V platform with OpenCL and SYCL allowing applications to target the underlying hardware using standard APIs.

The combination covers the ground from bare-metal and IP up through processor, debug, middleware and on to application software.

"Our aim in this collaboration is to enable accelerated product development cycles, lower costs and more agile development, in particular for IoT designs," said Rupert Baines, CEO of UltraSoC, in a statement.

"Our Codix-Bk series of RISC-V processor IP, with its LLVM-based development environment, make integration quick and low risk, demonstrating the power of commitment to open standards," said Karel Masarik, CEO of Codasip, in the same statement.

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