MRAM startup has China wafer fab plans

October 29, 2019 // By Peter Clarke
MRAM startup has China wafer fab plans
Startup HFC Semiconductor Corp. is on a recruitment drive for engineers to develop magnetoresistive random access memory (MRAM) technology and components and manufacture them in a 300mm fab in China.

Originally founded in New York state in May 2017, HFC (Albany, New York) now has staff in the US, Taiwan and China and claims to be developing its technology in collaboration with IBM. In some of the recently posted job adverts, the company is described as being focused on "14nm logic, MRAM and other technologies."

HFC's website indicates that the company has a perpendicular magnetic tunnel junction (pMTJ) device and describes its spin-torque transfer MRAM as being performance optimized and able to bring storage closer to compute. "The integration of MRAM in CMOS back-end-of-line can be achieved with adding as few as three masks, providing low-cost fabrication," the website observes.

On the LinkedIn website HFC Semiconductor states it plans, "to build full MRAM production capacity within the next couple of years." Job adverts elsewhere indicate that HFC Semiconductor has a rapidly expanding R&D centre in Taiwan and is planning to build or acquire a 300mm wafer fab in China.

The center-of-gravity for HFC's design work appears to be in the United States. Adverts state that HFC has multiple memory circuit and product design positions open for both junior and senior full-time mixed signal circuit designers in its MRAM technology group in New York state.

However, on a Taiwanese job site HFC has posted 35 positions in the last three months. Most of these are for process-related and in-fab positions. For example, the position of senior etch process engineer is described as being responsible for developing a leading-edge FinFET process in Albany, New York, and transferring that process to a "new fab in China for high volume manufacturing."

Elsewhere the company says it plans to provide an embedded MRAM solution for 55n and below processes. Over two years it says it plans to work with a well-known – but unnamed – industrial institute to develop a 55nm standard memory and use it as vehicle for developing embedded memory technology. In the next five years, the company states it will develop a process somewhere between 20nm and 29nm in which to implement products.

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