Report: TSMC, Japan to share cost of Tokyo chip facility

January 05, 2021 // By Peter Clarke
Report: TSMC, Japan to share cost of Tokyo chip facility
Leading foundry TSMC will establish a 50:50 joint venture with Japan's Ministry of Economy, Trade and Industry, to set up an IC packaging and testing facility in Tokyo, according to a Taiwanese report.

Japan had wanted to agree a wafer fab initiative similar to that made by TSMC with the US (see TSMC picks Arizona for 5nm wafer fab) but has been rebuffed, according to the report in Taiwan's United Daily News, which referenced unnamed sources. The UDN report did not indicate how large the investment in the packaging and test facility would be.

Nonetheless an advanced packaging capability would also be of strategic significance. In a geopolitical sense it would beneficial for Japan as, regardless of what happens between China and Taiwan, Japan could have access to leading-edge TSMC wafers made in the US and packaged in Japan.

Japan had been seeking domestic involvement from TSMC in 2020 (see Now Japan wants a domestic TSMC fab) as a response to increasing geopolitical tension around the world, and US moves to draw chip manufacturers on-shore (see TSMC dragged to the altar of US manufacturing).

TSMC has long had a Taiwanese manufacturing policy arguing that it gains economies of scale by focusing on a few locations in Taiwan. However, it has pragmatically relaxed that with fabs in China and the US in recent years. Japan's METI had signed a preparatory joint venture agreement with TSMC to establish the Japan Advanced Semiconductor Research and Development Center (JASRC), according to the report. Despite Japanese strength in semiconductor manufacturing equipment and materials, TSMC subsequently decided to drop the idea of building a wafer fab in Japan, the report said.

Next: Packaging instead


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