The process is a smaller version of TSMC's 16nm FinFET technology and was planned to be launched as a fourth variant of the 16nm manufacturing technology, the report said citing unnamed sources. However, TSMC has now decided to introduce the process as being at a different node, the report added.
The nominal 12nm process will have lower leakage and better cost characteristics, it was said. Having a 12nm process will help TSMC compete against Samsung and Globalfoundries, which both offer a process described as 14nm.
It was not said how quickly the 12nm process could be rolled out. However, as TSMC's 10nm FinFET process is expected to enter so-called risk production this year and ramp in 2017 it is likely that the 12nm process will be offered as an option on a similar time scale.
However, a relabelling would also show up how manufacturing process technology description has become almost pure marketing as the dimension used is no longer a metric of anything within the technology and often manufacturing processes are limited by back-end scaling as well as transistor size. Essentially manufacturing process development is now an almost continuous series of improvements and optimizations around power, performance and area.
TSMC, with numerous customers for its 16nm process – including Apple – is already working on more advanced manufacturing processes at nominal nodes of 10nm and 7nm.
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