Samsung boasts 6nm customer tape-out, about to sample 5nm FinFETs

April 16, 2019 //By Julien Happich
Samsung Foundry
Samsung Electronics has announced that its EUV-based 5-nanometer FinFET process technology is complete in its development and now is ready for customers’ samples.

The company says that compared to 7nm, the 5nm FinFET process technology provides up to a 25 percent increase in logic area efficiency with 20% lower power consumption or 10% higher performance. Like its predecessor, 5nm uses EUV lithography in metal layer patterning and reduces mask layers while providing better fidelity.

Another key benefit of 5nm is that all the 7nm IP can be re-used to 5nm, allowing 7nm customers to transition to 5nm at reduced migration costs while shortening their 5nm product development.

Since the fourth quarter of 2018, Samsung Foundry has provided its ‘Samsung Advanced Foundry Ecosystem (SAFE)’ partners, a robust design infrastructure for the 5nm node, including a process design kit (PDK), design methodologies, EDA tools, and IP. Samsung Foundry has already started offering 5nm Multi Project Wafer (MPW) service to customers.

“In successful completion of our 5nm development, we’ve proven our capabilities in EUV-based nodes,” said Charlie Bae, Executive Vice President of Foundry Business at Samsung Electronics. “In response to customers’ surging demand for advanced process technologies to differentiate their next-generation products, we continue our commitment to accelerating the volume production of EUV-based technologies.”

Vous êtes certain ?

Si vous désactivez les cookies, vous ne pouvez plus naviguer sur le site.

Vous allez être rediriger vers Google.