Samsung releases PDK for 3nm gate-all-around processes: Page 2 of 2

May 15, 2019 //By Peter Clarke
Samsung releases PDK for 3nm gate-all-around processes
Samsung has announced that the alpha version (v0.1) of its physical design kit (PDK) for its 3nm manufacturing process is available for customers to use.

Samsung has included four different nanosheet widths in its PDK. Transistor designs that are focused on low power will use narrower nanosheets while high-performance transistors or those with high fan-out can use wider sheets. But these widths are part of a continuum.

The company has already said that the 3nm process will come in two variants – 3GAAE and 3GAAP – standing for gate all around early and plus. These names appear to have been truncated to 3GAE and 3GAP.

According to reports Samsung expects its 3GAE process to see first tape outs and so-called risk production in 2022, with volume manufacturing late in 2021. The 3GAP process will be optimized for performance with risk production in 2021 and mass production in 2022, the reports said.

Related links and articles:

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Samsung to introduce nanosheet transistors in 3nm node

TSMC declares 5nm process ready for design

EUV lets TSMC shrink chip manufacturing process to 6nm

TSMC preps for 'chiplet' style manufacturing in 2021

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