Adele Gilliland, applications manager with IceMOS Technology Ltd.
Microelectromechanical systems (MEMS) design provides the basis for several different sensing technologies. According to one recent market forecast, the global MEMS sensors market was valued at US$11.7 billion in 2020 and is expected to reach US$16.8 billion by 2026, providing a compound annual growth rate (CAGR) of 6.5 percent.
Pressure sensors are expected to experience the fastest growth rate due to their utilization in multiple application areas, such as biomedicine, automotive electronics, small home appliances, wearable, and fitness electronics. As pressure sensors become more widely used in the harsh environments found in industrial, automotive and aerospace applications, accurate high temperature pressure measurements will become increasingly important.
Several design and manufacturing approaches are used to integrate monolithically the mechanical structures in the MEMS device to the signal conditioning and other circuitry that add functionality and value to the basic MEMS structure. The two most common approaches are MEMS-first and MEMS-last but there are variations between and within these two extremes.
With a MEMS-first approach, all the processing steps for the MEMS structure, including bulk micromachining, are performed prior to CMOS processing enabling the use of high temperatures that would damage or degrade CMOS. This means that temperatures greater than 1100°C can be used to obtain high-performance silicon on insulator substrates or release the stress in thick deposited polycrystalline silicon layers.
In contrast, a MEMS-last approach, which typically uses surface micromachining to deposit and then etch layers or bulk micromachining for the mechanical structure, must be kept below 400 or 450°C to avoid damaging the existing CMOS circuitry. This means that high performance MEMS materials, such as monocrystalline and polycrystalline silicon, common in inertial sensors and resonators, cannot be used.
The advantages of MEMS-first design, together with the development of stable and CMOS-compatible wafer-level packaging solutions, enable flexible and cost-effective system on chip (SoC) solutions.
Next: CSOI for high-temperature use cases