Toshiba improves SOI process for RF

March 02, 2020 // By Peter Clarke
Toshiba improves SOI process for RF
Toshiba has said it has improved its CMOS silicon-on-insulator process to improve performance for RF switches and low-noise amplifiers in 5G and Wi-Fi applications.

The process is known as TaRFSOI is SOI-CMOS and the latest generation of the process – TaRF11 – has an improved noise figure (NF). TaRF11-based MOSFETs, intended for use in LNAs, achieved a minimum noise figure of 0.48dB at 8 GHz, an improvement of 0.3dB compared to similar devices developed with TaRF10. In common with TaRF10, the TaRF11 process allows the LNA, RF switch and control circuit to be fabricated on a single chip.

Toshiba is continuing to develop the process to support the move of carrier frequencies from 5GHz up to 7GHz planned for smartphones.  In addition, Toshiba plans to develop devices for 7 GHz to 10 GHz ultra-wide band (UWB) using the TaRFSOI process.

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